Built-In Processor Blocks
Comparison Processor Blocks
Enter search terms or a module, class or function name.
Interleave ( stride: none )
signal Result [2] {} # Result is [ 3 , 7 ] [ 1 , 2 , 3 , 4 ] >> Add () >> Result; # Result is [ 4 , 6 ] [ 1 , 2 , 3 , 4 ] >> Interleave ( stride: 2 ) >> Add () >> Result;
DeInterleave ( stride: none )
GetPort ( index: none )
SetPort ( index: none )