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Built-In Processor Blocks

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Port Access Processor Blocks


Interleave ()

Interleave (
        stride:         none
)
stride:List of port indices to access.
signal Result [2] {}

# Result is [ 3 , 7 ]
[ 1 , 2 , 3 , 4 ] >> Add () >> Result;

# Result is [ 4 , 6 ]
[ 1 , 2 , 3 , 4 ] >> Interleave ( stride: 2 ) >> Add () >> Result;

DeInterleave ()

DeInterleave (
        stride:         none
)
stride:List of port indices to access.

GetPort ()

GetPort (
        index:          none
)
index:Index or indices to access.

SetPort ()

SetPort  (
        index:          none
)
index:Index or indices to access.